ASIC Power Engineer, Principal

Positron.ai

Remote· senior· $200K – $300K

This is a senior engineering role, but it's worth your attention early in your career if you're drawn to hardware design and willing to grow into a leadership position. Positron builds custom chips that make AI inference faster and more efficient than GPUs. You'd own the power strategy across their accelerator roadmap—defining how chips use energy from architecture through production silicon.

Your day-to-day involves building power models, running analysis on real workloads, and optimizing for both performance-per-watt and thermal constraints. You'll work across the full chip lifecycle: early architectural estimates, RTL simulation, gate-level verification, and silicon validation. This is deep technical work that directly impacts product performance.

This role makes sense if you have a strong foundation in electrical engineering, computer engineering, or physics, plus experience with power analysis tools and chip design. A portfolio showing prior hardware projects or internships helps. The principal level means you're expected to lead methodology and strategy, not just execute—so you need to think systematically about problems and communicate clearly across teams.

To apply, submit your résumé, a short note on why you're interested in power optimization, and links to any relevant work through CareerJumpShip. Remote work based in the US.

About this role

About Positron AI Positron AI specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems. Role Overview This role owns power architecture, estimation, optimization, and verification across Positron's AI accelerator roadmap. You will define power methodology from architectural modeling through silicon validation, ensuring industry-leading performance-per-watt while meeting aggressive power and thermal constraints. Key Responsibilities Power Architecture & Strategy Own the overall chip power strategy, defining approaches for dynamic power, leakage, clock power, memory power, interconnect power, SerDes power, idle power, and peak power. Power Modeling Develop accurate power models across the full development lifecycle, from early architectural estimation through RTL and gate-level estimation. Perform vector-based and activity-driven power analysis to validate estimates against real workload behavior. Power Optimization Drive power optimization techniques including clock gating, operand isolation, power gating, voltage islands, and multi-Vt optimization. Apply memory, pipeline, toggle-reduction, and data-movement optimization techniques, including approaches tailored to AI workloads. Power Integrity Partner with the backend team on IR drop, electromigration (EM), power distribution, and power grid planning. Define power-on sequencing, power domains, reset sequencing, isolation, retention, and UPF/CPF specifications. Power Verification Own power-aware simulation and UPF verification. Lead reset verification, low-power state validation, wakeup validation, and power sequencing verification. Cross-Functional Collaboration Partner closely with Architecture, RTL, Backend, Firmware, Thermal, Packaging, and System Engineering teams to align power decisions across the full chip development flow. AI-Enabled Engineering Use AI-driven tools to improve power analysis, regression triage, power anomaly detection, activity clustering, and identification of optimization opportunities. Required Qualifications 12+ years of ASIC design experience. Deep expertise in low-power design techniques and methodologies. Hands-on experience with UPF/CPF power specification and verification flows. Expert-level proficiency with PrimePower and Joules or equivalent power analysis tools. Strong background working with advanced process nodes. A solid grasp of RTL design and its impact on chip power. Proven experience achieving aggressive power targets in production silicon. Preferred Qualifications Experience with AI accelerator architectures. Familiarity with LPDDR and HBM memory interfaces. Working knowledge of PCIe. Experience with dynamic voltage and frequency scaling (DVFS). Exposure to thermal modeling. Hands-on experience with silicon power validation. Leveling & Scope While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire. What Success Looks Like Success in this role looks like power estimates that consistently predict silicon behavior, sustained performance-per-watt leadership across Positron's product line, and a power architecture that is reused and extended across future generations of chips. Why Join Us? Shape the power architecture foundation for a new generation of AI inference accelerators, with direct influence on Positron's performance-per-watt leadership. Work at the frontier of silicon and AI, on chips built specifically for the demands of large-scale LLM inference. Compensation & Benefits The base salary range for this role is $200,000 – $300,000. Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits. At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact. Benefits & Perks We want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future. Health and wellness Fully company-paid medical, dental, and vision insurance for you and your dependents Company-paid life and disability coverage, with voluntary options to add more Supplemental hospital, critical illness, and accident coverage available Time off and flexibility Unlimited paid time off, we encourage everyone to truly unplug and recharge 13 paid company holidays Remote-first culture with a company-provided computer and home office setup Compensation and future Competitive salary and equity 401(k) with company matching, eligible from day one Visa Support This position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates. Equal Opportunity Employer. If you're excited about the role but don't meet every bullet, we'd still love to hear from you. Originally posted on Himalayas

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